A simple flip-flop circuit can be formed from two level-sensitive latches, sometimes referred to as “master” and “slave” latches. These latches typically have identical structure. The first latch in the data path (the master latch) receives an inverted version of an input clock signal that is received by the second latch in the data path (the slave latch). As a result, when the input clock signal pulses (goes high), the slave latch opens, while the master latch doses. When the dock signal drops, the slave latch doses and the master latch opens. The present disclosure provides improvements on the present state of the art, as described below.